An important process component of integrated circuit manufacturing is Failure Analysis (FA). Generally FA is performed in response to customer returns, which are in turn in response to product failure issues which take place in the field. Additionally, FA is utilized for design debug, i.e., the analysis of failures due to imperfection of designing or processing, and feedback to circuit designers or processing fabs to correct the problem or to improve production yields. Many IC failures are can be observed as “hot spots”, i.e., spots where electroluminescence processes take place from failed devices exhibiting electrical current leakage. The hot spots are a symptom of the defect, not the failure itself. Therefore, the hot spots can occur at the actual site of a circuit short, or they can appear at a first location in response to a circuitry malfunction at a second location “upstream”. These hot spots are most easily identified and localized by a tool known as the photon emission microscope (PEM), a widely used tool for the detection of low-level light emission from failed devices. The PEM is described in D. L. Barton, P. Tangyunyong, J. M. Soden, and A. Y. Liang, Proceedings of 22nd ISTFA, p9, 1996, and U.S. Pat. Nos. 6,112,004 and 5,892,539, all of which are hereby incorporated by reference. The PEM is the quickest and the most effective tool for localizing hot spots, and does not require substantial a prior knowledge of the IC device. These aspects of the PEM make it the primary initial tool in the early phase of IC failure analysis, since in FA, the turn-around time is paramount. The customer generally requires the fastest possible response time, since entire product lines may depend on the reliability of the incorporated IC's.
Once the hot spot is localized, the next step is to determine the cause of the failure which has produced the hot spot. One technique used in this determination is to perform circuit edits such as cutting traces which may be triggering the hot spot, or by routing a new trace so as to avoid hot emission. This curcuit editing is generally performed using a Focused Ion Beam (FIB) in a FIB instrument. One such instrument is the OptiFIB manufactured by NPTest, LLC, described in U.S. patent application Ser. No. 10/239,293 (patent application Publication No. US 2003/0102436), which is hereby incorporated by reference in its entirety. Following the editing of the likely triggering traces, the device is tested or probed to verify that the failure is fixed. PEM can be utilized again as a probe tool to verify that the hot spot is gone as a result of the FIB edit. If the hot spot still exists, then the circuit edit process must be continued using the FIB until the failure is fixed.
The process outlined above is often iterative, i.e., requiring alternating between PEM and FIB tools multiple times. Switching between a stand-alone PEM and a FIB machine is time consuming and inefficient. For each switch, mapping between imaging and CAD layout tools, i.e., circuit registration, is required in order to locate features and/or devices. In addition, system set-up time (e.g., vacuum interface and pumping, electrical interface, and CAD loading) is also required each time the sample or stimulation tools are loaded into the system. An integrated PEM/FIB tool would enhance efficiency in failure analysis and debugging, since both circuit validation by PEM and circuit edit by FIB would be in-situ, i.e., no transfer between instruments would be necessary.